Magnetic disk drive

ABSTRACT

There is provided a magnetic disk drive in which the adaptability of read signal processing of the magnetic disk drive is enhanced so that the frequency of retry or miscorrection in use is reduced. This magnetic disk drive has a read circuit, and a channel condition measuring circuit. An output of an A/D converter contained in the read circuit is supplied to a digital equalizing circuit so as to be equalized accurately. Upon input of a signal for instructing a coefficient learning circuit to learn the coefficient of the digital equalizing circuit, the initial coefficient registered in a register is set as a coefficient value in another register and the coefficient learning circuit is operated to start consecutive learning of coefficient values. In the channel condition measuring circuit, errors in a row of output values of the digital equalizing circuit are calculated and an integrated value of squares of the errors is compared with an error threshold value. If the integrated value is larger than the error threshold value, coefficient learning is regarded as being abnormal and a control signal for discarding the coefficient registered in the register is issued so that the register is reset to the initial coefficient value. The signal for instructing the coefficient learning circuit to learn the coefficient may be outputted in a sector previous to the read target sector or may be outputted in the read target sector.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a magnetic disk drive (HDD) andparticularly to a reproduction control method for avoiding deteriorationof drive performance caused by application of coefficient learning in astate in which the positional divergence of a read head is large.

[0002] The configuration and reproducing operation of a background-artmagnetic disk drive will be described below.

[0003]FIG. 12 shows an example of the configuration of a magnetic diskdrive (HDD) 10.

[0004] The HDD 10 comprises a head disk assembly (HDA) 20, and apackaged circuit board (PCB) 30.

[0005] The HDA 20 includes magnetic disks 2-1 to 2-5, suspension 108provided with magnetic heads 1-1 to 1-10 attached thereto, a carriage103, a read/write IC (R/WIC) 104 attached on the carriage 103, a spindlemotor 105, and a flexible printed cable (FPC) 106.

[0006] The PCB 30 is constituted by a signal processing LSI (SPC) 21, ahard disk controller chip (HDC) 22, a servo controller (SRVC) 23, amicroprocessor (MP) 24, a host bus interface chip (HBI) 25, an ROM 26, abuffer RAM 27, etc.

[0007] The read operation of the HDD 10 will be described below withreference to FIGS. 12 through 15.

[0008] A read signal corresponding to a magnetic field and detected fromthe magnetic disk 2-1 by an MR (Magneto-Resistive) head of the magnetichead 1-1 in FIG. 12 is supplied to the R/WIC 104 through wiring on thesuspension 108.

[0009] In the R/WIC 104, selection of one of the magnetic heads 1-1 to1-10 and the sense current value of the selected MR head are set inadvance through the MP 24.

[0010] A resistance change of the MR head due to the magnetic field inthe magnetic disk 2-1 is converted into a voltage change. Further, theR/WIC 104 amplifies the read signal to a value of from the order of tensof mVp-p to the order of hundreds of mvp-p and outputs the amplifiedread signal 33 to the SPC 21.

[0011] This signal 33 is supplied to a read signal processing circuit(RSPC) 201 of the SPC 21 in FIG. 13.

[0012]FIG. 14 shows the configuration of the RSPC 201.

[0013] The signal 33 is amplified to have a suitable amplitude by avariable gain amplifier (VGA) 210 in the first stage of the RSPC 201.Unnecessary high-frequency noise is removed from the amplified signaland the read waveform of the amplified signal is roughly equalized by anactive equalizer (AF) 211.

[0014] Then, the analog signal of the AF 211 is converted into a digitalsignal by an A/D converter (ADC) 212. The digital signal is equalizedaccurately by a digital equalizer (FIR) 213 in the latter stage.

[0015] Further, the signal of the FIR 213 is detected to a row of serialdata by a maximum likelihood detector (ML) 214. A sync byte (SB)indicating the start of user data is detected in this serial data row bya sync byte detector (SBDET) 215.

[0016] On the basis of a result of the detection, the serial data row isconverted into parallel data and decoded by a decoder (DEC) 216.Further, the parallel data is restored to data 34 through a descrambler(DSC) 217. Further, read data 35 is supplied to the HDC 22 through aninterface (INT) 202 in FIG. 13.

[0017] Further, the data 35 supplied to the HDC 22 is subjected to errordetection and error correction by an error correction circuit (ECC) 22-1in the HDC 22, and supplied as data 48 to a user (host PC, or the like)through the HBI 25.

[0018] A control operation will be described below in the case where acylinder is sought from Cn to Cm to read a plurality of data sectorsDS1, DS2, DS3 . . . as shown in FIG. 15.

[0019] TRK_WDTH shows an arrangement of servo and data regions.

[0020] The servo controller (SRVC) 23 successively reproduces servosignals SRVi recorded on a disk surface to thereby obtain a positioningsignal 42 through a servo signal processing circuit (SSPC) 204 tothereby perform positioning control.

[0021] The MP 24 gives a seek command (SEEK) 40 to the SRVC 23. The SRVC23 analyzes the positioning signal 42 obtained in a signal SRV1 (FIG.13) in servo region. If a judgment is made from the analysis that datais enabled to read, the SRVC 23 outputs a “read seek complete” signal(RD_SK_COMP) 47 to the HDC 22. As a result, the HDC 22 outputs a “readgate” signal (RG) 36 from the data region DS1.

[0022] The threshold value of completion of positioning for issuing theRD_SK_COMP 47 in the read operation is generally set to be larger thanthe threshold value in the write operation to attain reduction of theseek completion time.

[0023] At read time, as shown in FIG. 14, the RG 37 supplied to the RSPC201 through the INT 202 operates most of portions in the RSPC 201 andalso operates a coefficient learning circuit (ADAPT) 218 whichadaptively learns the coefficient of the FIR 213.

[0024] As a result, the coefficient value registered in an equalizingcharacteristic setting register (COEF) 219 is consecutively changed to acoefficient value for giving good reproducing characteristic even in thecase where the resolving power of the reproductive signal 33 varies inaccordance with the change of head/disk characteristic, head spacing, orthe like, caused by the change of the operating environment, such astemperature, atmospheric pressure, or the like, of the HDD 10.

[0025] In such a background art, however, there were two problems asfollows.

[0026] The first problem is increase of error caused by divergenceoccurs in the equalizing coefficient of the FIR 213.

[0027] As shown in FIG. 15, the effective track width (TRK_WDTH) variesin accordance with the positional divergence of the MR head and thepositioning state at write time. Particularly just after seeking, thereis the possibility that the positional divergence is widened because ofthe influence of settling of head, or the like.

[0028] When, for example, a data sector DS1 to be read is present justafter the RD_SK_COMP 47, the read gate (RG) 37 is opened in the positionof DS1 in the condition in which the sufficiently effective track widthcannot be obtained because of the aforementioned deterioration, or thelike.

[0029] In this condition, the ADAPT 218 cannot operate normally. As aresult, the initial value Km(init) of the coefficient value of the FIR213 registered in the equalizing characteristic setting register (COEF)219 may diverge to a coefficient value Km(adapt) in which datareproduction cannot be performed normally on the basis of a learningoperation.

[0030] In this case, the data row produced from the NRZ data 34 containsa lot of channel byte errors as shown in FIG. 15. Accordingly, there isa high possibility that the errors cannot be perfectly corrected by theerror correction circuit (ECC) 22-1 in the HDC 22.

[0031] Further, if the performance for checking the miscorrection of theECC is insufficient, the possibility that the erroneously corrected datamay be sent to the host becomes high (mischecking).

[0032] Because the data sector DS2 following the data sector DS1 alsouses the aforementioned abnormal coefficient value as an initial value,there is a high possibility that the same problem as described aboveoccurs consecutively.

[0033] The data sectors DS3 . . . following the data sector DS2 form a(substantially on-track) sector region having a large effective trackwidth. Also in the sectors DS3 . . . , there is a very high possibilitythat channel byte error occur frequently.

[0034] To correct this error, it is necessary to restart a readoperation with the effective track width kept sufficient while rotatingthe disk to wait for the same sectors (DS1 . . . ) to come in thecondition in which the COEF is reset to the initial value Km(init) in adata restoration sequence (retry).

[0035] If the aforementioned condition occurs frequently, theperformance of the device is lowered greatly.

[0036] The second problem is that reproducing characteristic at ordinarytime deteriorates.

[0037] In the background art shown in FIG. 14, the “read gate” signal(RG) is used as a signal for starting the ADAPT 218. Accordingly, in theread state, the coefficient of the FIR 213 registered in the COEF 219always varies, so that adaptive noise is generated.

[0038] In this case, the generation of adaptive noise can be suppressedto thereby avoid the increase of output noise of the FIR 213 if not onlythe number of bits in the COEF 219 is set to be sufficiently larger thanthe number of bits in the output of the ADC 212 but also acoefficient-correction step parameter of the ADAPT 218 is set to besufficiently small.

[0039] When the initial coefficient value is out of the optimumcoefficient value because of an environmental change, or the like, thereis, however, a tendency that error occurs in a sector of a read leadingportion.

[0040] That is, the frequency of retries increases if a largeenvironmental change occurs.

[0041] To cover the deterioration of the drive performance,specifications of the drive concerning environmental changes, such ashead/disk characteristic, spacing between heads/disks, or the like,cannot but be set severely. Accordingly, this brings about bothreduction of the yield of heads/disks and increase of the cost of thedrive.

SUMMARY OF THE INVENTION

[0042] An object of the present invention is to solve the aforementionedproblems, and to provide a high-performance low-cost magnetic disk drivein which the adaptability of the magnetic disk drive to read signalprocessing is enhanced so that the frequency of retries ormiscorrections is reduced.

[0043] In order to achieve the foregoing object, according to an aspectof the present invention, there provided a magnetic disk drive having awaveform equalization means for equalizing waveforms reproduced, and anadaptive learning means for adaptively learning the equalizingcharacteristic of the waveform equalization means, wherein the magneticdisk drive further has an abnormal learning detection means fordetecting an abnormal operation in the adaptive learning of theequalizing characteristic just after learning of a sector, and anequalizing characteristic resetting means for resetting the equalizingcharacteristic before the adaptive learning to an initial value beforelearning of a next sector when abnormality occurs in the adaptivelearning, and wherein the adaptive learning of the equalizingcharacteristic is performed simultaneously with an operation ofreproducing designated data.

[0044] According to another aspect of the present invention, there isprovided a magnetic disk drive having a waveform equalization means forequalizing waveforms reproduced, and an adaptive learning means foradaptively learning the equalizing characteristic of the waveformequalization means, wherein the magnetic disk drive further has anabnormal learning detection means for detecting an abnormal operation inthe adaptive learning of the equalizing characteristic just afterlearning of a sector, and an equalizing characteristic resetting meansfor resetting the equalizing characteristic before the adaptive learningto an initial value before learning of a next sector when abnormalityoccurs in the adaptive learning, and wherein the adaptive learning ofthe equalizing characteristic is performed before an operation ofreproducing designated data.

[0045] Preferably, the equalizing characteristic of the waveformequalizing means is fixed during the operation of reproducing thedesignated data.

[0046] According to a further aspect of the present invention, there isprovided a magnetic disk drive having an active filter supplied with aread waveform of a magnetic disk, an A/D conversion means supplied withan output of the active filter, and a waveform equalizing means suppliedwith an output of the A/D conversion means, wherein the magnetic diskdrive further has: an adaptive learning means for adaptively learningthe boost characteristic of the active filter on the basis of the inputand output of the waveform equalizing means so that error in thewaveform equalizing means is minimized; an abnormal learning detectionmeans for detecting an abnormal operation in adaptive learning of theboost characteristic just after learning of a sector; and a boostcharacteristic resetting means for resetting the boost characteristicbefore the adaptive learning to an initial value before adaptivelearning of the next sector when abnormality occurs in adaptivelearning; and wherein the adaptive learning of the boost characteristicis carried out simultaneously with the operation of reproducing thedesignated data.

[0047] According to a further aspect of the present invention, there isprovided a magnetic disk drive having an active filter supplied with aread waveform of a magnetic disk, an A/D conversion means supplied withan output of the active filter, and a waveform equalizing means suppliedwith an output of the A/D conversion means, wherein the magnetic diskdrive further has: an adaptive learning means for adaptively learningthe boost characteristic of the active filter on the basis of the inputand output of the waveform equalizing means so that error in thewaveform equalizing means is minimized; an abnormal learning detectionmeans for detecting an abnormal operation in adaptive learning of theboost characteristic just after learning of a sector; and a boostcharacteristic resetting means for resetting the boost characteristicbefore the adaptive learning to an initial value before adaptivelearning of the next sector when abnormality occurs in adaptivelearning; and wherein the adaptive learning of the boost characteristicis carried out before the operation of reproducing the designated data.

[0048] Preferably, the abnormal learning detection means for detectingan abnormal operation in the adaptive learning of the equalizingcharacteristic just after learning of a sector compares an integratedvalue of squares of equalization errors of the waveform equalizationmeans with an error threshold value to thereby detect an abnormaloperation.

[0049] Preferably, the magnetic disk drive further has a maximumlikelihood detecting means for most likely detecting a read waveform,wherein the abnormal learning detection means for detecting an abnormaloperation in adaptive learning of the equalizing characteristic justafter learning of a sector uses a difference metric value between pathmetric values of the maximum likelihood detecting means as data to beused for detecting the abnormal operation.

[0050] Preferably, the read waveform decoding means has an errordetection means, wherein the abnormal learning detection means fordetecting abnormality in adaptive learning of the equalizingcharacteristic just after learning of a sector judges an abnormaloperation on the basis of a result of detection obtained by the errordetection means.

[0051] According to a further aspect of the present invention, there isprovided a signal processing chip used in a magnetic disk drive forcontrolling read/write data of a magnetic disk, having: a waveformequalizing means for equalizing a reproductive waveform; an adaptivelearning means for adaptively learning the equalizing characteristic ofthe waveform equalizing means; a quality judgment means for judging thequality of an output signal of the waveform equalizing means; and afunction of discarding a result of learning obtained by the adaptivelearning means in accordance with a result of judgment obtained by thequality judgment means.

[0052] According to a further aspect of the present invention, there isprovided a magnetic disk drive having a digital waveform processingmeans capable of continuously reproducing a plurality of sectors,wherein the magnetic disk drive further has: a sampled data holdingmeans for holding a row of digital sampled data corresponding to atleast one sector in a front stage of a waveform equalizing meanscontained in the digital waveform processing means; and an abnormalsector detection means for detecting abnormality in an output signal ofthe digital waveform processing means whenever a sector is read; andwherein, when the abnormal sector detection means detects abnormality inan output signal of the digital waveform processing means, the sampleddata holding means holds a row of digital sampled data having thedetected abnormality so that an abnormal sector is enabled to be decodedagain by use of the data row held by the sampled data holding means.

[0053] Preferably, the adaptation speed of adaptive learning of theequalizing characteristic during an operation of read data is set to belower than the adaptation speed of adaptive learning of the equalizingcharacteristic carried out before the data reproducing operation.

BRIEF DESCRIPTION OF THE DRAWINGS

[0054]FIG. 1 is a diagram showing the overall configuration of a readsignal processing system according to a first embodiment of the presentinvention;

[0055]FIG. 2 is a diagram showing a reproducing circuit in the firstembodiment of the present invention;

[0056]FIG. 3 is a diagram showing a reproducing circuit according to asecond embodiment of the present invention;

[0057]FIG. 4 is a flow chart showing a read seek control sequence in thecontroller in the second embodiment of the present invention;

[0058]FIG. 5 is a flow chart showing a coefficient learning controlsequence in the second embodiment of the present invention;

[0059]FIG. 6 is a flow chart showing a read control sequence in thesecond embodiment of the present invention;

[0060]FIG. 7 is a flow chart showing a retry sequence using a waveformmemory in the reproducing circuit in the second embodiment of thepresent invention;

[0061]FIG. 8 is a flow chart showing an erasure correction method usingerror position information in the reproducing circuit in the secondembodiment of the present invention;

[0062]FIG. 9 is a time chart showing a sequence of operations in thefirst embodiment of the present invention in the case where positionaldivergence after seeking is relatively small;

[0063]FIG. 10 is a time chart showing a sequence of operations in thefirst embodiment of the present invention in the case where positionaldivergence after seeking is relatively large;

[0064]FIG. 11 is a diagram showing a reproducing circuit constituting athird embodiment of the present invention;

[0065]FIG. 12 is a diagram showing the overall configuration of amagnetic disk drive in the background art;

[0066]FIG. 13 is a diagram showing the overall configuration of a readsignal processing system in the background art;

[0067]FIG. 14 is a diagram showing the reproducing circuit in thebackground art; and

[0068]FIG. 15 is a time chart showing a sequence of operations in thebackground art in the case where positional divergence after seeking isrelatively large.

DESCRIPTION OF THE EMBODIMENTS

[0069] A first embodiment of the present invention will be describedbelow with reference to FIGS. 1 through 10. The overall configuration ofthe HDD in this embodiment is substantially the same as that in thebackground art shown in FIG. 12, except a part of the PCB 30.

[0070]FIG. 1 shows the overall configuration of a read signal processingsystem. A read signal 33 from an R/WIC 104 of an HDA 20 is supplied to areproducing circuit (RSPC) 201 in a signal processing LSI (SPC) 21 inFIG. 1.

[0071] The signal is amplified to have a suitable amplitude by avariable-gain amplifier (VGA) 210 in the first stage of the RSPC 201 inFIG. 2. Unnecessary high-frequency noise is removed from the amplifiedsignal, and the read waveform of the amplified signal is roughlyequalized by an active filter (AF) 211.

[0072] Then, the signal of the AF 211 is converted into a digital signalby an A/D converter (ADC) 212, and finely equalized by a digitalequalizer (FIR) 213 which a waveform equalization means in the latterstage.

[0073] Further, the output of the FIR 213 signal is detected to a row ofserial data by a maximum likelihood detector (ML) 214. A header which isa sync byte (SB) indicating the beginning of user data is detected inthis data row by a sync byte detector (SBDET) 215.

[0074] The serial data row is converted into parallel data on the basisof a result of the detection. The parallel data is decoded by a decoder(DEC) 216 and further restored to data 34 through a descrambler (DSC)217.

[0075] Here, the SBDET 215 generates a byte clock signal 54 to beoutputted after detection of a sync byte and supplies the byte clocksignal 54 to a channel condition measuring circuit (CCM) 205 whichmeasures the channel condition statistically.

[0076] At this time, when a “training equalizer enable” signal (TREQ_EN)51 is supplied to a coefficient learning circuit (ADAPT) 218 to instructthe circuit 218 to learn the coefficient of the FIR 213, the coefficientlearning circuit (ADAPT) 218 as means of adaptively learning thecoefficient indicating the equalizing characteristic of the FIR 213 isoperated. As a result, an initial coefficient value registered in aninitial equalizing characteristic setting register (COEF0) 219-1 by theMP 24 is registered as a coefficient value in the equalizingcharacteristic setting register (COEF) 219 of the FIR 213 to startsuccessive learning. The initial coefficient value registered in theinitial equalizing characteristic setting register (COEF0) 219-1 is usedalso for resetting the coefficient value registered in the equalizingcharacteristic setting register (COEF) 219.

[0077] Here, the TREQ_EN 51 is a control signal outputted from the HDC22. In this case, the TREQ_EN 51 outputted at the beginning of a sectorprevious to a target sector to be read out.

[0078] The TREQ_EN 51 is activated in a section including a data portionof a data sector, a CRC (cyclic redundancy check code) portion of data,and an ECC (error correction code).

[0079] In the case where a sector is separated by a servo region, theTREQ_EN is also separately output.

[0080] In this embodiment, a channel condition measurement (CCM) 205 formeasuring the channel condition statistically to thereby detect anabnormal state in adaptive learning is further provided in the SPC 21.The CCM 205 is operated simultaneously with the operation of the ADAPT218 on the basis of the coefficient learning gate signal (TREQ_EN) 51.

[0081] The CCM 205 includes a byte counter (BCNT) 205-11. In a period inwhich the TREQ_EN 51 is active, a byte clock signal 54 is outputtedafter SBD (sync byte detection). The number of pulses contained in thebyte clock signal 54 is counted by the BCNT 205-11 before the length ofthe byte clock signal 54 reaches a predetermined total byte lengthconsisting of a data length, a CRC length and a ECC length in a sector.

[0082] Even in the case where The TREQ_EN 51 is closed in the middle ofcounting because of a servo region, or the like, the BCNT 205-11 holdsthe count value so that the counting is restarted on the basis of thenext “read gate” (RG) 37.

[0083] Accordingly, the internal sequencer of the CCM 205 can recognizethe end of a sector even in the case where the sector is separated by aservo region, or the like.

[0084] In the CCM 205, statistical measurement is carried out in such amanner as follows. As shown in FIG. 2, errors in an output value row 53of the FIR 213 are calculated by a combination of a comparator 205-7 anda substractor 205-6. The calculated errors are squared through amultiplier 205-1. The squared errors are further added up by acombination of an adder 205-2 and a data latch 205-3. This statisticalmeasurement is carried out in a bit cycle.

[0085] At a point of time when the TREQ_EN 51 is closed and thestatistical measurement of a sector is completed, a comparator 205-4compares a result 55 of the statistical measurement with an errorthreshold value (ETH) 205-5 which is set by the MP 24.

[0086] A numerical value beyond an allowable range based on ordinaryenvironmental changes, or the like, is set in the ETH 205-5 so that astate in which a result of coefficient learning is abnormal can bejudged clearly on the basis of the numerical value.

[0087] If the result 55 of the measurement is larger than the ETH 205-5,it is concluded that the operation in adaptive learning is abnormal, anda control signal 52 is issued to the ADAPT 218 to discard thecoefficient value registered in the COEF 219.

[0088] In this manner, the initial coefficient value registered in theCOEF0 219-1 is set in the COEF 219 again.

[0089] That is, an adaptive learning operation is checked for everysector (DS1, . . . DSN) so as to make it possible to discard a result oflearning in real time if the operation is abnormal.

[0090] The “read gate” signal (RG) 37 is supplied from the data regionDS1. Most portions of the RSPC 201 except the ADAPT 218 are operated onthe basis of the RG 37 to read data.

[0091] Incidentally, the control signal 52 serves also as an abnormalsector detection signal and the CCM serves also as an abnormal sectordetection means and also as a quality judgment means for judging thequality of an output signal of the waveform equalizing means.

[0092] The control operation of this embodiment will be described belowin detail.

[0093] Here, the control operation will be described in the case where aplurality of data sectors DS1, DS2, DS3 . . . are read successively justafter a cylinder is sought from Cn to Cm as shown in FIGS. 9 and 10.

[0094]FIG. 9 shows the case where positional divergence after seeking isso small that the effective track width is wide. FIG. 10 shows the casewhere positional divergence after seeking is so large that the effectivetrack width is narrow.

[0095] The description of the control operation will be omitted here insuch a case where a data sector is separated by a servo region.

[0096] The control operation will be described first in the case wherepositional divergence of the read head after seeking is relatively smallas shown in FIG. 9.

[0097] When a “seek” command (SEEK) 40 is given to the SRVC 23 from theMP 24, an initial coefficient Km(init) corresponding to the cylinder Cmis set, through the COEF0 219-1, in the COEF 219 which registers thecoefficient value of the FIR 213.

[0098] When a “read seek complete” signal (RD_SK_COMP) 47 is given tothe HDC 22, the HDC 22 outputs a coefficient learning gate signal(TREQ_EN) 51 prior to the data region DS1 (that is, the coefficient islearned prior to the data region DS1).

[0099] In this embodiment, the region in which the TREQ_EN 51 is activeis a data region DS0 which is one sector previous to the data region DS1as shown in FIG. 9.

[0100] The learning region DS0 is also a sector in which user data isrecorded. The sector DS0 is, however, other than target sectors to beread out (that is, other than sectors designated by a user to be readout).

[0101] In this case, the effective track width is relatively wide.Accordingly, even in the case where the initial coefficient valueKm(init) is divergent because of environmental changes, or the like, theADAPT 218 operates normally. Accordingly, the coefficient value Km isadapted consecutively in the learning region DS0, so that errors(divergence from the target value) in an output of the FIR 213 arereduced slowly.

[0102] When, for example, channel byte errors are contained in NRZoutputs 34 and 35 in the leading portion of the DS0 as shown in FIG. 9,the errors are reduced with the advance of learning.

[0103] Even in the case where head/disk characteristic, head spacing,and so on, vary in accordance with the change of the operatingenvironment, such as temperature, atmospheric pressure, etc., of the HDD10 to thereby change the resolving power of the read signal 33, thecoefficient value registered in the COEF 219 is changed consecutively toa coefficient value for giving good read performance.

[0104] Here, the result 55 of the statistical measurement in the channelcondition measurement (CCM) 205 becomes smaller than the ETH 205-5.Accordingly, the control signal 52 is not output.

[0105] In this embodiment, the coefficient value adaptively learned isfixed in the COEF 219 in the target sectors to be read out. Data on andafter the DS1 are read (reproduced) continuously by the fixedcoefficient value.

[0106] Further, adaptive learning is carried out only in a regionpreceding a data reproducing region. Accordingly, the step parameter ofthe ADAPT 218 can be set to be large, so that high-speed adaptation canbe made.

[0107] Further, the adaptive operation is stopped in the datareproducing region. Accordingly, the deterioration of read performancecaused by adaptive noise in a region to be read can be avoided.

[0108] On the other hand, in the case where positional divergence afterseeking is so large that the effective track width is narrow as shown inFIG. 10, the equalizing characteristic of the FIR varies widely inaccordance with the abnormal operation of the ADAPT 218. Accordingly,errors in the output of the FIR and channel errors increase.

[0109] On this occasion, the result 55 of the statistical measurement inthe channel condition measuring circuit (CCM) 205 increases rapidly withthe advance of learning so that the result 55 becomes larger than theETH 205-5.

[0110] Accordingly, the control signal 52 is outputted. The coefficientvalue after adaptive learning reset to the initial coefficient valueKm(init). The following data regions DS1 . . . are read on the basis ofthe initial coefficient value (fixed) set at the time of shipping.

[0111] In this case, improvement of performance due to adaptive learningcannot be expected. There is, however, a high possibility of avoidingthe situation that adaptive learning malfunctions so that reading ismade on the basis of widely diverged equalizing characteristic tothereby make errors continuously in the following sectors to makereal-time ECC correction impossible. Accordingly, a retry operationaccompanied with rotational latency can be prevented from occurringfrequently.

[0112] Incidentally, it is obvious that the same effect as describedabove can be obtained also when a result of error detection in the ECCin the HDC is used as the control signal 52 for discarding thecoefficient value registered in the COEF 219. Further, the controlsignal using a result of error detection in the ECC serves also as anabnormal sector detection signal and the ECC in the HDC serves also asan abnormal sector detection means and also as a quality judgment meansfor judging the quality of an output signal of the waveform equalizingmeans.

[0113] It is further obvious that the adaptive coefficient learningregion in which the TREQ_EN 51 is active may be constituted by aplurality of sectors (DS0 to DS3).

[0114] In this case, learned coefficients are discarded continuously ina part of the learning region in which a sufficient effective trackwidth cannot be obtained. From a point of time when a sufficienteffective track width is obtained, a normal coefficient value isobtained.

[0115] A wide learning region can be secured on average compared withthe case where coefficient learning is carried out in only one sectorjust before the RG 37 is activated. Accordingly, the probability thatadaptive learning is completed normally becomes so high that thefrequency in use of the retry can be reduced more greatly.

[0116] If a wide learning region can be secured, the step parameter(corresponding to the adaptation speed of adaptive learning) foradaptive learning can be reduced. Accordingly, the stability of learningincreases.

[0117] Incidentally, if there is no learning sector taken in prior tothe DS1 after outputting of the RD_SK_COMP 47, a learning sectoraccompanied with rotational latency may be secured or sectors DS1 andafter DS1 may be read without rotational latency.

[0118] Further, the learning sector may be preferably secured justbefore the DS1 after outputting of the RD_SK_COMP 47. This is becausethere is a high possibility that positional divergence becomes smallwith the passage of time after outputting of the RD_SK_COMP 47.

[0119] Although the above description has been made upon the case whereadaptive learning is carried out in a region preceding a datareproducing region, the prevent invention can be applied also to thecase where adaptive learning is carried out in a data reproducingregion. In this case, if a result of learning is abnormal, thecoefficient value after leaning may be reset to the initial coefficientvalue Km(init) so that data reading is made in the following dataregion.

[0120] Although the aforementioned embodiment has shown the case whereadaptive learning is not carried out during the reading operation, it isa matter of course that adaptive learning may be carried out during thereading operation while the influence of adaptive noise is suppressed ifthe step parameter is set suitably (the step parameter is changed overbetween a value for the exclusive learning region before reading and avalue for the reading operation).

[0121] In this case, when the result of the statistical measurement inthe CCM in data reading deteriorates, the coefficient value in sectorreading just after the data reading is reset to the initial coefficientvalue Km(init) so that sectors in which errors occur frequently areprevented from being generated continuously.

[0122] A second embodiment of the present invention will be describedbelow with reference to FIG. 3.

[0123] In this embodiment, a reproducing circuit (RSPC) 201 and achannel condition measuring circuit (CCM) 205 which are differentconstituent parts from those in the first embodiment will be describedas the center of the subject.

[0124] In this embodiment, a waveform memory (MEM) 221 for storing a rowof output values of the ADC in time sequence is constituted by an MEM1221-1 and an MEM2 221-2 for two sectors on the assumption that a sectoris split (a sector is separated by a servo region).

[0125] Further, the smallest value 53-1 of difference metric valuesbetween path metric values in respective conditions in a maximumlikelihood detector (ML) 214 is used for the statistical measurement inthe channel condition measuring circuit (CCM) 205.

[0126] The smallest value 53-1 of difference metric values is suppliedto a comparator 205-8 in the CCM 205 so as to be compared with adifference metric threshold value (VMTH) 205-9 which is set by the MP 24in advance.

[0127] If the smallest value 53-1 of difference metric values is smallerthan the VMTH 205-9, the possibility of occurrence of errors is regardedas being high so that a data latch 205-3 is counted up by an adder205-2.

[0128] At the same time, byte clock pulses 54 outputted from the SBDET215 are regarded as flag points and the byte clock pulses 54 areregistered in a flag point register (FPREG) 205-10 successively.

[0129] After bytes corresponding to one sector are counted by the BCNT205-11 after the TREQ_EN 51 (or RG 37) is activated, the count value ofthe data latch 205-3 compared with an error threshold value (ETH) 205-5set in advance. If the count value of the data latch 205-3 is largerthan the ETH 205-5, the sector is regarded as an abnormal sector and thecontrol signal 52 outputted.

[0130] On the basis of the control signal 52, the coefficient valuelearned at the time of coefficient learning is discarded and the initialcoefficient value registered in the COEF0 219-1 is set in the registerCOEF 219. The coefficient value after learning is set in the same manneras in the first embodiment.

[0131] The control signal 52 serves also as an abnormal sector detectionsignal. The CCM in FIG. 3 serves as an abnormal sector detection meansand also as a quality judgment means for judging the quality of anoutput signal of the waveform equalizing means.

[0132] Incidentally, the FPREG 205-10 may be provided in the HDC 22 sothat an output of the comparator 205-8 outputted as an error-possibilityflag signal to the HDC 22.

[0133] On the other hand, the waveform memories (MEM1 and MEM2) 221-1and 221-2 are subjected to data recording at the time of data reading. Asampled waveform after the operation of the ADC 212 is fetched in theMEM1. A second-half portion of a sector split by a servo region isfetched in the MEM2.

[0134] On this occasion, when a lot of error flags are generated fromthe comparator 205-8 so that the count value of the data latch 205-3exceeds the threshold value of the ETH 205-5, the control signal 52supplied to the MEM 221 so that overwriting in the MEM 221 on the basisof the RG 37 after that is stopped.

[0135] The control signal 52 is also supplied to the MP 24 so that theMP 24 is informed of recording of failure sector candidate data in theMEM 221.

[0136] On the basis of the information given to the MP 24, the MP 24 canknow whether the sector concerning outputting of the control signal 52has been corrected by CRC check of the ECC 22-1 in the HDC 22 or not. Ifthe sector has been not corrected, the waveform data recorded in the MEM221 is selected through a switch (SW) 222 so that the waveform in theMEM 221 is supplied to the FIR 213 on the basis of a suitable RG 37input from the HDC 22. As a result, decoding (retry-on-the fly) can bemade without data access on the disk. When the sector is split, bothMEM1 and MEM2 are used.

[0137] On this occasion, the coefficient value of the FIR 213 and thegain (G) 223 can be changed on the basis of the FPREG 205-10 or erasurecorrection (correction for restoring erased data) using the FPREG 205-10as an erasure position (erasing position of data), or the like, can bemade.

[0138] Further, in the background art, when even one sector incontinuous sectors cannot be corrected by real-time ECC, there isgenerally a high possibility that errors occur to make it impossible tocorrect the following sectors. Accordingly, a continuous readingoperation must be stopped so that a retry operation is carried out fromthe error sector. That is, in the background art, there is a highpossibility that rotational latency corresponding to one rotation isrequired.

[0139] When the present invention is used, rotational latency can beeliminated in most cases.

[0140] An operational sequence from the start of “read seek” in a secondembodiment of the present invention will be described below withreference to FIGS. 4 through 8 which are flow charts.

[0141]FIG. 4 shows a high-order sequence viewed from the controllerside. FIG. 5 shows a detailed sequence for coefficient learning control.FIG. 6 shows a detailed sequence for data reading control.

[0142]FIG. 7 shows a sequence for on-the-fly retry control 1 using bothMEM1 and MEM2. FIG. 8 shows an erasure correction method using a flagpoint register (FPREG).

[0143] As shown in FIG. 4, when “read seek” is started (step 401), thebyte counter (BCNT) in the CCM reset and MEMW_EN=1 and i=1 are set asone setting of registers for reading to thereby make it possible torecord data in the MEM1.

[0144] When “seek” is completed (step 403) and a sector position forcoefficient learning is reached (step 404), “coefficient learningcontrol” is started (step 405).

[0145] As shown in FIG. 5, when TREQ_EN 51 rises (steps 501 and 502) anda sync byte is detected (SBD) (step 503), the coefficient learningcircuit (ADAPT) is started (step 504).

[0146] At the same time, while the number of bytes is counted (BCNT)(step 505), the difference metric value in the decoder is compared withthe threshold value (VMTH) (step 506). As the difference metric valuedecreases, the result of judgment becomes more obscure. If thedifference metric value is smaller than the VMTH, the number of errors(205-3) is counted up (step 507). This procedure (steps 505 to 507) isrepeated unless the TREQ_EN falls (step 508).

[0147] At this point of time, “coefficient learning” stopped (step 509)and checking is made as to whether the byte count value exceeds thetotal byte length (for example, data length+CRC length+ECC length) ofone sector or not (step 510).

[0148] If the byte count value does not exceed the total byte length ofone sector because of splitting, or the like, waiting for second-halfTREQ_EN to rise is performed. If one sector is completed, the errorcount value is checked (step 511). If the error count value exceeds thethreshold value (ETH), the coefficient obtained by coefficient learningis discarded and reset to the initial coefficient value which is a valuebefore learning (step 512).

[0149] Further, the byte counter (BCNT) in the CCM is reset (step 513)and “coefficient learning control” is terminated (step 514).

[0150] As shown in FIG. 4, after waiting for the arrival of the readsector (step 406), “read control” shown in FIG. 6 is started (step 407).

[0151] Various registers necessary for reading are set in advance when“read seek” is started (step 401).

[0152] When the RG rises (step 602), sampled values of the ADC arerecorded in the MEM1 before the RG falls (steps 603, 604, 605 and 611).

[0153] On the other hand, in a data reproducing system, a sync byte isdetected (SBD) (step 606), the number of bytes is counted (BCNT) (step607) and the difference metric value on the maximum likelihood detectoris compared with the threshold value (VMTH) (step 608). If thedifference metric value is smaller than the VMTH, the number of errors(205-3) is counted up (step 609) and error byte positions are registeredin the flag point register (FPREG) (step 610). This procedure (steps 607to 610) is repeated unless the RG falls (step 611).

[0154] At the point of time when the RG falls, “coefficient learning” isstopped and the byte count value (BCNT) is checked (step 612). If thebyte count value does not exceed the total byte length of one sectorbecause of splitting, or the like, i=2 is set and waiting forsecond-half RG to rise is performed (step 613).

[0155] If one sector is completed, the error count value is checked(step 614). If the error count value exceeds the threshold value (ETH),writing in both MEM1 and MEM2 is prohibited (MEMW_EN=0) and the controlsignal 52 indicating the frequent occurrence of errors sent to thecontroller side to thereby inform the controller side that a row ofsampled data in the read sector have been recorded in the MEM (step615).

[0156] Further, the byte counter (BCNT) in the CCM is reset and i=1 isset (step 616). Thus, “read control” of one sector is completed (step617).

[0157] As shown in FIG. 4, if the control signal 52 has a value of “1”in the controller side (step 408), the waveform holding sector No. isstored (step 409).

[0158] Further, on-the-fly ECC (OTF-ECC) correction (ECC correction ofdata which have been already read) is executed (step 410) and CRC checkis executed (step 411). If either OTF-ECC correction or CRC check hasresulted in failure, the checked error sector No. is stored (step 413).If both OTF-ECC correction and CRC check have resulted in success, readdata are stored in the buffer RAM (step 412).

[0159] Unless the sector to be read is completed in parallel with the“ECC and CRC check” operation, “read control” is operated continuously(steps 414 and 407).

[0160] If there is no sector to be read, checking is made as to whetherthere is any sector which has resulted in failure by OTF-ECC or CRCcheck (step 415). If the checked error sector No. is stored, the checkederror sector No. is compared with the waveform holding sector No. (step416). If the checked error sector No. does not coincide with thewaveform holding sector No., an ordinary retry sequence is carried out(step 421).

[0161] If the checked error sector No. coincides with the waveformholding sector No., “on-the-fly retry control 1” is carried out (step417) as follows.

[0162]FIG. 7 shows the outline of an operational sequence (step 701) for“on-the-fly retry control 1”.

[0163] The SW 222 in the read signal processing circuit (RSPC) is turnedto the MEM side so that error byte point information (FPREG) isacquired. The setting of parameter in the RSPC is changed on the basisof the distribution of error byte points (step 702).

[0164] In the case where errors occur because of medium failure andthermal asperity caused by an MR head, the errors are concentrated inspecific byte points. In the case where errors occur because of an S/Nfactor such as the change of resolving power, positioning failure, orthe like, error points are dispersed.

[0165] Various combinations are thought of. For example, in the former,the gain G is controlled and, in the latter, the coefficient value ofthe FIR is adjusted.

[0166] In this condition, a row of data recorded in the MEM1 can bedecoded again when the RG from the controller side is input into asuitable position (step 703). The timing of outputting the RG from thecontroller side may be determined suitably if the timing is out of servoregion.

[0167] Incidentally, also in a continuous reading state, when reading ofsectors corresponding to at least one track is completed and the trackor head is shifted to a next one, an idle time corresponding to severalsectors is always required for positioning the track to a new one orchanging the head to a new one. Accordingly, this time can be applied to“on-the-fly retry control 1”.

[0168] At the point of time when data stored in the MEM1 are decodedagain, the number of bytes in the BCNT checked. If the number of bytesdoes not reach the total byte length (because of sector splitting) (step704), data stored in the MEM2 are further decoded again (step 705).

[0169] After data are decoded again, both resetting of the byte counter(BCNT) in the CCM and setting of i=1 are performed and the SW 222 isturned to the ADC side (step 706). Thus, “on-the-fly retry control 1” ofthe sector in which errors occur frequently is terminated (step 707).

[0170] As shown in FIG. 4, a result of decoding data again is checked inthe controller side on the basis of ECC+CRC (step 418). If the checkinghas resulted in success, data are stored in the buffer RAM (step 423)and “read seek” for continuous sectors is completed (step 425).

[0171] If the checking on the basis of ECC+CRC has resulted in failure,“on-the-fly retry control 2” is used (step 419). As shown in FIG. 8,erasure correction on the basis of acquisition of error byte pointinformation (FPREG) is carried out (steps 801, 802, 803 and 804).

[0172] Incidentally, when erasure correction cannot be carried out inreal time as the time required for erasure correction, “on-the-fly retrycontrol” is not carried out but an ordinary retry sequence shown in FIG.4 is carried out (steps 420, 421, 422 and 424). In the ordinary retrysequence, erasure correction is carried out. On this occasion, errorbyte point information (FPREG) can be utilized.

[0173] Although this embodiment has shown an example of configurationapplied to the abnormality of one sector in continuous reading of aplurality of sectors, it is obvious that the present invention can beapplied to the abnormality of some sectors in continuous reading of aplurality of sectors if the MEM capacity is set to be larger.

[0174] A third embodiment of the present invention will be describedbelow with reference to FIG. 11.

[0175] In this embodiment, description will be made on only thereproducing circuit (RSPC) 201 which is a constituent part differentfrom that in the first embodiment.

[0176] In this embodiment, the ADAPT 219 is configured so as toadaptively control a register (BOOST) 220 used for setting the boostquantity of an active filter (AF) 211.

[0177] Upon reception of a “seek” command 40, the MP 24 sets thecoefficient value registered in the COEF0 219 for determining theequalizing characteristic of the FIR 213 and also sets the initial boostquantity (BOOST0) 220 of the AF 212.

[0178] In this condition, when the TREQ_EN 51 is issued from the HDD 22,the ADAPT 218 adaptively controls the BOOST 220 on the basis of theinput and output of the FIR 213 so that error in the output of the FIR213 is minimized.

[0179] The CCM 205 detects the error at this time to thereby monitorwhether the BOOST 220 is controlled suitably or not. If the BOOST 220 isnot controlled suitably, the BOOST 220 is reset to the initial boostquantity (BOOST0) on the basis of the control signal 52. The criterionof judgment is the same as in the first embodiment.

[0180] In this embodiment, the change of resolving power caused by theenvironmental change of the head/disk is compensated on the basis of thesetting of the BOOST 220 of the AF which is an analog circuit.

[0181] Transient response accompanying the change of the boost settingquantity of the AF is so continuous that a relatively smooth adaptiveequalizing operation can be made. Accordingly, deterioration caused byadaptive noise can be avoided when the coefficient of the FIR ischanged.

[0182] Accordingly, in this embodiment, an adaptation operation can becontinued easily also in data reproduction.

[0183] In this case, the CCM monitoring the control condition of theadaptation operation may be operated simultaneously in data reproductionso that the boost quantity is reset to the initial boost quantity whenthe increase of errors or the frequent occurrence of data errors isdetected.

[0184] It is a matter of course that this embodiment can be combinedwith the MEM 221 as shown in the second embodiment.

[0185] According to the aforementioned embodiments of the presentinvention, the adaptability of read signal processing of a magnetic diskdrive to environmental changes, or the like, can be enhanced so that thefrequency in use of retry or miscorrection can be reduced. Accordingly,a high-performance low-cost magnetic disk drive can be provided.

What is claimed is:
 1. A magnetic disk drive comprising a waveformequalization means for equalizing waveforms reproduced from a magneticdisk, and an adaptive learning means for adaptively learning anequalizing characteristic of said waveform equalization means, whereinsaid magnetic disk drive further comprises an abnormal learningdetection means for detecting an abnormal operation in said adaptivelearning means just after learning of a sector when said adaptivelearning means adaptively learns the equalizing characteristic of saidwaveform equalization means, and an equalizing characteristic resettingmeans for resetting the equalizing characteristic before adaptivelearning to an initial value before learning of a next sector when saidabnormal learning detection means detects abnormality in said adaptivelearning means.
 2. A magnetic disk drive according to claim 1, whereinsaid adaptive learning of said equalizing characteristic is performedsimultaneously with an operation of reproducing designated data.
 3. Amagnetic disk drive according to claim 1, wherein said adaptive learningof said equalizing characteristic is performed before an operation ofreproducing designated data.
 4. A magnetic disk drive according to claim1, wherein said abnormal learning detection means for detecting anabnormal operation in said adaptive learning of said equalizingcharacteristic just after learning of a sector compares an integratedvalue of squares of equalization errors of said waveform equalizationmeans with an error threshold value to thereby detect an abnormaloperation.
 5. A magnetic disk drive according to claim 1, furthercomprising a maximum likelihood detecting means for most likelydetecting a read waveform, wherein said abnormal learning detectionmeans for detecting an abnormal operation in said equalizingcharacteristic just after learning of a sector uses a difference metricvalue between path metric values of said maximum likelihood detectingmeans as data to be used for detecting said abnormal operation.
 6. Amagnetic disk drive according to claim 3, wherein the equalizingcharacteristic of said waveform equalizing means is fixed during theoperation of reproducing the designated data.
 7. A magnetic disk drivecomprising an active filter supplied with a read waveform of a magneticdisk, an A/D conversion means supplied with an output of said activefilter, and a waveform equalizing means supplied with an output of saidA/D conversion means, wherein said magnetic disk drive furthercomprises: an adaptive learning means for adaptively learning a boostcharacteristic of said active filter on the basis of an input and anoutput of said waveform equalizing means so that error in said waveformequalizing means is minimized; an abnormal learning detection means fordetecting an abnormal operation in adaptive learning of said boostcharacteristic just after learning of a sector; and a boostcharacteristic resetting means for resetting the boost characteristicbefore adaptive learning to an initial value before adaptive learning ofa next sector when abnormality occurs in adaptive learning of saidadaptive learning means.
 8. A magnetic disk drive according to claim 7,wherein adaptive learning of said boost characteristic carried outsimultaneously with reproducing operation of designated data.
 9. Amagnetic disk drive according to claim 7, wherein adaptive learning ofsaid boost characteristic carried out before reproducing operation ofdesignated data.
 10. A magnetic disk drive according to claim 7, whereinsaid abnormal learning detection means for detecting an abnormaloperation in said adaptive learning of said equalizing characteristicjust after learning of a sector compares an integrated value of squaresof equalization errors of said waveform equalization means with an errorthreshold value to thereby detect an abnormal operation.
 11. A magneticdisk drive according to claim 7, further comprising a maximum likelihooddetecting means for most likely detecting a read waveform, wherein saidabnormal learning detection means for detecting an abnormal operation inadaptive learning of said equalizing characteristic just after learningof a sector uses a difference metric value between path metric values ofsaid maximum likelihood detecting means as data to be used for detectingsaid abnormal operation.
 12. A magnetic disk drive comprising a digitalwaveform processing means capable of continuously reproducing aplurality of sectors of a magnetic disk, wherein said magnetic diskdrive further comprises: a sampled data holding means for holding a rowof digital sampled data corresponding to at least one sector in a frontstage of a waveform equalizing means contained in said digital waveformprocessing means; and an abnormal sector detection means for detectingabnormality in an output signal of said digital waveform processingmeans whenever a sector is read; and wherein when said abnormal sectordetection means detects abnormality in an output signal of said digitalwaveform processing means, said sampled data holding means holds a rowof digital sampled data having said detected abnormality so that anabnormal sector is enabled to be decoded again by use of said data rowheld by said sampled data holding means.
 13. A signal processing chipused in a magnetic disk drive for controlling read/write data of amagnetic disk, comprising: a waveform equalizing means for equalizing aread waveform; an adaptive learning means for adaptively learning anequalizing characteristic of said waveform equalizing means; a qualityjudgment means for judging quality of an output signal of said waveformequalizing means; and a function of discarding a result of learningobtained by said adaptive learning means in accordance with a result ofjudgment obtained by said quality judgment means.